How to produce a middle C on intel 8080?

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This is a example problem in my book. Assuming pin 5 of port 4 is connected to an amplifier that drives a loudspeaker, the solution is given as,



The frequency of middle C is $$f=261.63 textHz$$
So, the time period is,
$$T=frac1f=3822 mu s$$



The program to produce a square wave with that period is,



LOOP1: OUT 4H ;Send bit to speaker
 MVI C,86H ;Set count to 134
LOOP2: DCR C ;Count down
 JNZ LOOP2 ;Test count
 CMA ;Reset bit 5
 NOP ;Fine tune
 NOP ;Fine tune
 JMP LOOP1 ;Go for next half cycle


The number of T states is given as, OUT(10), MVI(7), DCR(4), JNZ(10 if true, else 7), CMA(4), NOP(4), JMP(10).



With a clock frequency of 1 Hz, LOOP2(for half cycles) runs for 1912 microseconds, which is close enough. LOOP1 should run again sending the complement of what was previously in bit 5 of port 4. But I think it doesn't.



When LOOP2 ends, the accumulator has 00H left over from C register. CMA changes the accumulator to FFH. NOP and JMP don't change the accumulator. So then the LOOP1 iterates for the next half cycle, OUT sents accumulator contents to port 4, i.e, FFH whose bit 5 is 1, everytime. So there is not a square wave, it's just a high signal. Then how does it produce a middle C?






assembly sound 8080







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  • Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
    – PlasmaHH
    1 hour ago














up vote
1
down vote

favorite












This is a example problem in my book. Assuming pin 5 of port 4 is connected to an amplifier that drives a loudspeaker, the solution is given as,



The frequency of middle C is $$f=261.63 textHz$$
So, the time period is,
$$T=frac1f=3822 mu s$$



The program to produce a square wave with that period is,



LOOP1: OUT 4H ;Send bit to speaker
 MVI C,86H ;Set count to 134
LOOP2: DCR C ;Count down
 JNZ LOOP2 ;Test count
 CMA ;Reset bit 5
 NOP ;Fine tune
 NOP ;Fine tune
 JMP LOOP1 ;Go for next half cycle


The number of T states is given as, OUT(10), MVI(7), DCR(4), JNZ(10 if true, else 7), CMA(4), NOP(4), JMP(10).



With a clock frequency of 1 Hz, LOOP2(for half cycles) runs for 1912 microseconds, which is close enough. LOOP1 should run again sending the complement of what was previously in bit 5 of port 4. But I think it doesn't.



When LOOP2 ends, the accumulator has 00H left over from C register. CMA changes the accumulator to FFH. NOP and JMP don't change the accumulator. So then the LOOP1 iterates for the next half cycle, OUT sents accumulator contents to port 4, i.e, FFH whose bit 5 is 1, everytime. So there is not a square wave, it's just a high signal. Then how does it produce a middle C?






assembly sound 8080







share|improve this question





















  • Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
    – PlasmaHH
    1 hour ago












up vote
1
down vote

favorite









up vote
1
down vote

favorite











This is a example problem in my book. Assuming pin 5 of port 4 is connected to an amplifier that drives a loudspeaker, the solution is given as,



The frequency of middle C is $$f=261.63 textHz$$
So, the time period is,
$$T=frac1f=3822 mu s$$



The program to produce a square wave with that period is,



LOOP1: OUT 4H ;Send bit to speaker
 MVI C,86H ;Set count to 134
LOOP2: DCR C ;Count down
 JNZ LOOP2 ;Test count
 CMA ;Reset bit 5
 NOP ;Fine tune
 NOP ;Fine tune
 JMP LOOP1 ;Go for next half cycle


The number of T states is given as, OUT(10), MVI(7), DCR(4), JNZ(10 if true, else 7), CMA(4), NOP(4), JMP(10).



With a clock frequency of 1 Hz, LOOP2(for half cycles) runs for 1912 microseconds, which is close enough. LOOP1 should run again sending the complement of what was previously in bit 5 of port 4. But I think it doesn't.



When LOOP2 ends, the accumulator has 00H left over from C register. CMA changes the accumulator to FFH. NOP and JMP don't change the accumulator. So then the LOOP1 iterates for the next half cycle, OUT sents accumulator contents to port 4, i.e, FFH whose bit 5 is 1, everytime. So there is not a square wave, it's just a high signal. Then how does it produce a middle C?






assembly sound 8080







share|improve this question













This is a example problem in my book. Assuming pin 5 of port 4 is connected to an amplifier that drives a loudspeaker, the solution is given as,



The frequency of middle C is $$f=261.63 textHz$$
So, the time period is,
$$T=frac1f=3822 mu s$$



The program to produce a square wave with that period is,



LOOP1: OUT 4H ;Send bit to speaker
 MVI C,86H ;Set count to 134
LOOP2: DCR C ;Count down
 JNZ LOOP2 ;Test count
 CMA ;Reset bit 5
 NOP ;Fine tune
 NOP ;Fine tune
 JMP LOOP1 ;Go for next half cycle


The number of T states is given as, OUT(10), MVI(7), DCR(4), JNZ(10 if true, else 7), CMA(4), NOP(4), JMP(10).



With a clock frequency of 1 Hz, LOOP2(for half cycles) runs for 1912 microseconds, which is close enough. LOOP1 should run again sending the complement of what was previously in bit 5 of port 4. But I think it doesn't.



When LOOP2 ends, the accumulator has 00H left over from C register. CMA changes the accumulator to FFH. NOP and JMP don't change the accumulator. So then the LOOP1 iterates for the next half cycle, OUT sents accumulator contents to port 4, i.e, FFH whose bit 5 is 1, everytime. So there is not a square wave, it's just a high signal. Then how does it produce a middle C?






assembly sound 8080




assembly sound 8080






share|improve this question













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asked 4 hours ago









Ayatana

13824




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  • Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
    – PlasmaHH
    1 hour ago
















  • Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
    – PlasmaHH
    1 hour ago















Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
– PlasmaHH
1 hour ago




Nobody here uses the 8080 anymore, so you might have more luck if you get your question migrated to retrocomputing
– PlasmaHH
1 hour ago










1 Answer
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2
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DCR C decrements the C register and sets flags; it does not affect the accumulator (aka A register). The only instruction in this sequence which affects the accumulator is the CMA. Thus on each pass through LOOP1, the accumulator will be complemented - bit 5 high on one cycle and low on the next.






share|improve this answer






















  • The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
    – Ayatana
    3 hours ago










  • I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
    – Russell Borogove
    3 hours ago










  • But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
    – Ayatana
    3 hours ago










  • There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
    – Russell Borogove
    3 hours ago










  • Try the online 8085 emulator here: sim8085.com
    – Russell Borogove
    3 hours ago










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DCR C decrements the C register and sets flags; it does not affect the accumulator (aka A register). The only instruction in this sequence which affects the accumulator is the CMA. Thus on each pass through LOOP1, the accumulator will be complemented - bit 5 high on one cycle and low on the next.






share|improve this answer






















  • The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
    – Ayatana
    3 hours ago










  • I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
    – Russell Borogove
    3 hours ago










  • But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
    – Ayatana
    3 hours ago










  • There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
    – Russell Borogove
    3 hours ago










  • Try the online 8085 emulator here: sim8085.com
    – Russell Borogove
    3 hours ago














up vote
2
down vote













DCR C decrements the C register and sets flags; it does not affect the accumulator (aka A register). The only instruction in this sequence which affects the accumulator is the CMA. Thus on each pass through LOOP1, the accumulator will be complemented - bit 5 high on one cycle and low on the next.






share|improve this answer






















  • The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
    – Ayatana
    3 hours ago










  • I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
    – Russell Borogove
    3 hours ago










  • But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
    – Ayatana
    3 hours ago










  • There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
    – Russell Borogove
    3 hours ago










  • Try the online 8085 emulator here: sim8085.com
    – Russell Borogove
    3 hours ago












up vote
2
down vote










up vote
2
down vote









DCR C decrements the C register and sets flags; it does not affect the accumulator (aka A register). The only instruction in this sequence which affects the accumulator is the CMA. Thus on each pass through LOOP1, the accumulator will be complemented - bit 5 high on one cycle and low on the next.






share|improve this answer














DCR C decrements the C register and sets flags; it does not affect the accumulator (aka A register). The only instruction in this sequence which affects the accumulator is the CMA. Thus on each pass through LOOP1, the accumulator will be complemented - bit 5 high on one cycle and low on the next.







share|improve this answer














share|improve this answer



share|improve this answer








edited 2 hours ago

























answered 4 hours ago









Russell Borogove

5081311




5081311











  • The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
    – Ayatana
    3 hours ago










  • I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
    – Russell Borogove
    3 hours ago










  • But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
    – Ayatana
    3 hours ago










  • There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
    – Russell Borogove
    3 hours ago










  • Try the online 8085 emulator here: sim8085.com
    – Russell Borogove
    3 hours ago
















  • The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
    – Ayatana
    3 hours ago










  • I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
    – Russell Borogove
    3 hours ago










  • But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
    – Ayatana
    3 hours ago










  • There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
    – Russell Borogove
    3 hours ago










  • Try the online 8085 emulator here: sim8085.com
    – Russell Borogove
    3 hours ago















The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
– Ayatana
3 hours ago




The DCR C first copies the content of C register to accumulator, decrements it and then stores the data back into C register. Because the ALU can only work on accumulator. Also, JNZ is a ALU flag which only checks the accumulator. If DCR C didn't affect the accumulator, then, JNZ LOOP2 instruction will be run forever.
– Ayatana
3 hours ago












I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
– Russell Borogove
3 hours ago




I don’t believe that’s true — I’m not an 8080 expert by any means but the sources I’ve looked at don’t indicate that the accumulator is affected by DCR (except DCR A, of course). The flags are affected, however. An internal register in the ALU is changed but written back to C, not A.
– Russell Borogove
3 hours ago












But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
– Ayatana
3 hours ago




But the instruction is JNZ, not JNZ C. If the flags are affected, then depending on which register? It's the accumulator, right? The internal registers of the ALU is the accumulator and TMP.
– Ayatana
3 hours ago












There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
– Russell Borogove
3 hours ago




There’s only one set of flags. I believe that the ALU has internal registers separate from the accumulator A. I don’t see any hint in several different online 8080 instruction references that DCR C affects the contents of the A register.
– Russell Borogove
3 hours ago












Try the online 8085 emulator here: sim8085.com
– Russell Borogove
3 hours ago




Try the online 8085 emulator here: sim8085.com
– Russell Borogove
3 hours ago

















 

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