Is the ATMEGA328P's serial baud rate quantised?
Clash Royale CLAN TAG#URR8PPP
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I'm using an ATMEGA328p, running from its internal oscillator (divided by 8 = 1MHz).
I've (roughly) measured the oscillator output, using my Salae logic analyser, as ranging from 960KHz to 1000KHz, so it's not awful. I did this using the "Clock output on PORTB0" fuse.
If I set the baud rate to 9,600, it outputs serial at 10,220 baud. (Is this because I'm not using a crystal, or because of quantisation?)
If I either increase F_CPU or decrease USART_BAUDRATE, gradually, the output serial baud does not decrease, until it jumps to 8,800 baud.
#define USART_BAUDRATE 9600
#define BAUD_PRESCALE (((F_CPU / (USART_BAUDRATE * 16UL))) - 1)
int main(void) {
// serial port setup
UCSR0B |= (1 << RXEN0) | (1 << TXEN0);
UCSR0C |= (1 << UCSZ00) | (1 << UCSZ01);
UBRR0H = (BAUD_PRESCALE >> 8);
UBRR0L = BAUD_PRESCALE;
...
Is there some form of quantisation affecting the output baud?
P.S. I'm using GCC on Linux to compile code, and I'm not using Arduino code/IDE.
avr serial rs232 atmega328p
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up vote
1
down vote
favorite
I'm using an ATMEGA328p, running from its internal oscillator (divided by 8 = 1MHz).
I've (roughly) measured the oscillator output, using my Salae logic analyser, as ranging from 960KHz to 1000KHz, so it's not awful. I did this using the "Clock output on PORTB0" fuse.
If I set the baud rate to 9,600, it outputs serial at 10,220 baud. (Is this because I'm not using a crystal, or because of quantisation?)
If I either increase F_CPU or decrease USART_BAUDRATE, gradually, the output serial baud does not decrease, until it jumps to 8,800 baud.
#define USART_BAUDRATE 9600
#define BAUD_PRESCALE (((F_CPU / (USART_BAUDRATE * 16UL))) - 1)
int main(void) {
// serial port setup
UCSR0B |= (1 << RXEN0) | (1 << TXEN0);
UCSR0C |= (1 << UCSZ00) | (1 << UCSZ01);
UBRR0H = (BAUD_PRESCALE >> 8);
UBRR0L = BAUD_PRESCALE;
...
Is there some form of quantisation affecting the output baud?
P.S. I'm using GCC on Linux to compile code, and I'm not using Arduino code/IDE.
avr serial rs232 atmega328p
add a comment |Â
up vote
1
down vote
favorite
up vote
1
down vote
favorite
I'm using an ATMEGA328p, running from its internal oscillator (divided by 8 = 1MHz).
I've (roughly) measured the oscillator output, using my Salae logic analyser, as ranging from 960KHz to 1000KHz, so it's not awful. I did this using the "Clock output on PORTB0" fuse.
If I set the baud rate to 9,600, it outputs serial at 10,220 baud. (Is this because I'm not using a crystal, or because of quantisation?)
If I either increase F_CPU or decrease USART_BAUDRATE, gradually, the output serial baud does not decrease, until it jumps to 8,800 baud.
#define USART_BAUDRATE 9600
#define BAUD_PRESCALE (((F_CPU / (USART_BAUDRATE * 16UL))) - 1)
int main(void) {
// serial port setup
UCSR0B |= (1 << RXEN0) | (1 << TXEN0);
UCSR0C |= (1 << UCSZ00) | (1 << UCSZ01);
UBRR0H = (BAUD_PRESCALE >> 8);
UBRR0L = BAUD_PRESCALE;
...
Is there some form of quantisation affecting the output baud?
P.S. I'm using GCC on Linux to compile code, and I'm not using Arduino code/IDE.
avr serial rs232 atmega328p
I'm using an ATMEGA328p, running from its internal oscillator (divided by 8 = 1MHz).
I've (roughly) measured the oscillator output, using my Salae logic analyser, as ranging from 960KHz to 1000KHz, so it's not awful. I did this using the "Clock output on PORTB0" fuse.
If I set the baud rate to 9,600, it outputs serial at 10,220 baud. (Is this because I'm not using a crystal, or because of quantisation?)
If I either increase F_CPU or decrease USART_BAUDRATE, gradually, the output serial baud does not decrease, until it jumps to 8,800 baud.
#define USART_BAUDRATE 9600
#define BAUD_PRESCALE (((F_CPU / (USART_BAUDRATE * 16UL))) - 1)
int main(void) {
// serial port setup
UCSR0B |= (1 << RXEN0) | (1 << TXEN0);
UCSR0C |= (1 << UCSZ00) | (1 << UCSZ01);
UBRR0H = (BAUD_PRESCALE >> 8);
UBRR0L = BAUD_PRESCALE;
...
Is there some form of quantisation affecting the output baud?
P.S. I'm using GCC on Linux to compile code, and I'm not using Arduino code/IDE.
avr serial rs232 atmega328p
avr serial rs232 atmega328p
edited 3 hours ago
asked 3 hours ago
fadedbee
493214
493214
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2 Answers
2
active
oldest
votes
up vote
2
down vote
accepted
It is a fully digital system. It must operate in discrete steps.
This is the formula from the datasheet:
UBRR register is 16 bits wide (UBRRL + UBRRH), so it can only lead to 65536 possible baud settings.
Look also at section "24.11. Examples of Baud Rate Setting" and table 24-4 of the datasheet.
add a comment |Â
up vote
2
down vote
If you own a precise logic analyzer you might want to calibrate the internal clock frequency via OSCCAL (Oscillator Calibration Register) in order to get further precision. Anyways, a crystal oscillator is almost always needed on a clean asynchronous communication.
add a comment |Â
2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
oldest
votes
active
oldest
votes
up vote
2
down vote
accepted
It is a fully digital system. It must operate in discrete steps.
This is the formula from the datasheet:
UBRR register is 16 bits wide (UBRRL + UBRRH), so it can only lead to 65536 possible baud settings.
Look also at section "24.11. Examples of Baud Rate Setting" and table 24-4 of the datasheet.
add a comment |Â
up vote
2
down vote
accepted
It is a fully digital system. It must operate in discrete steps.
This is the formula from the datasheet:
UBRR register is 16 bits wide (UBRRL + UBRRH), so it can only lead to 65536 possible baud settings.
Look also at section "24.11. Examples of Baud Rate Setting" and table 24-4 of the datasheet.
add a comment |Â
up vote
2
down vote
accepted
up vote
2
down vote
accepted
It is a fully digital system. It must operate in discrete steps.
This is the formula from the datasheet:
UBRR register is 16 bits wide (UBRRL + UBRRH), so it can only lead to 65536 possible baud settings.
Look also at section "24.11. Examples of Baud Rate Setting" and table 24-4 of the datasheet.
It is a fully digital system. It must operate in discrete steps.
This is the formula from the datasheet:
UBRR register is 16 bits wide (UBRRL + UBRRH), so it can only lead to 65536 possible baud settings.
Look also at section "24.11. Examples of Baud Rate Setting" and table 24-4 of the datasheet.
answered 2 hours ago
filo
5,7101930
5,7101930
add a comment |Â
add a comment |Â
up vote
2
down vote
If you own a precise logic analyzer you might want to calibrate the internal clock frequency via OSCCAL (Oscillator Calibration Register) in order to get further precision. Anyways, a crystal oscillator is almost always needed on a clean asynchronous communication.
add a comment |Â
up vote
2
down vote
If you own a precise logic analyzer you might want to calibrate the internal clock frequency via OSCCAL (Oscillator Calibration Register) in order to get further precision. Anyways, a crystal oscillator is almost always needed on a clean asynchronous communication.
add a comment |Â
up vote
2
down vote
up vote
2
down vote
If you own a precise logic analyzer you might want to calibrate the internal clock frequency via OSCCAL (Oscillator Calibration Register) in order to get further precision. Anyways, a crystal oscillator is almost always needed on a clean asynchronous communication.
If you own a precise logic analyzer you might want to calibrate the internal clock frequency via OSCCAL (Oscillator Calibration Register) in order to get further precision. Anyways, a crystal oscillator is almost always needed on a clean asynchronous communication.
answered 2 hours ago
DrPepe
283
283
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